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Memristive Technologies
from functional oxides to AI on a chip
Themis Prodromakis
Professor of Nanotechnology
Zepler Institute, University of Southampton
Zepler Institute for Photonics & Nanoelectronics
Outline
Modern electronics challenges & the AI era needs
Memristors:
• Technology
• Tools & Infrastructure
Application Examples – beyond memory
Conclusion
Our AI is as good as our access to data
ENGINEERING CHALLENGE: “The fundamental design of separate memory and
processing places a limit on what can be achieved.”
Can we continue scaling?
The end of Moore’s law???
Memristive Technologies
Chua’s symmetry argument STM image of HP’s memristor cross-bar
Cross-section of a memristor’s
core.
L. Chua, “Memristor-the missing circuit element,” IEEE Trans. Circuit Theory, vol. 18, 1971.
R. Williams, “How we found the missing memristor,” IEEE spectrum, vol. 45, 2008.
Memristor (Memory-resistor)
E-Beam lithography of Sub 15 nm ultrahigh density cross-bar memory chips
Memristors fabrication
Scientific Reports, 6, 32614, 2016.
12
Metal-oxide memristors memory capacity up to 7-bit states per cell
13
Scientific Reports, 7, 17532, 2017.
b)a)
Resistance(k)
30
50
70
90
0 5010 4020 30
Resistance(k)
80
Time (hrs)
2 3 4 50 1
60
40
30
70
50
Time (ms)
S1
S47
b) c)
Cumulativedistributionfunction(%)
Resistance (k
30
0
20
80
60
40
100
40 50 60
Resistance(k)
6
80
Time (hrs)
2 3 4 50 871
60
40
30 S1
S47
S5
S7
70
50
S1
Memristors as analogue memory
Application Demonstrators
Examples – beyond memory
Example #1
In-silico ML implementations
Scientific Reports, 6, 18639, 2016.
Eric Kandel
Nobel Prize
in Physiology 2000
Emulating synapses with memristors
17
Unsupervised learning in probabilistic memristor neural network
Switching vs.
resistive state
relation at fixed
voltage levels ->
Exploit to encode
conditional
probabilities
Desired switching level
Approx. operating V
Unsupervised Learning
Nature Communications, 7, 12611, 2016.
18
• Network shows capability of learning in unsupervised manner and handles mistakes rather well.
• Copes with cases where class centres drift over time.
Unsupervised learning in probabilistic memristor neural network
Unsupervised Learning
Nature Communications, 7, 12611, 2016.
19
Unsupervised learning in probabilistic memristor neural network
Unsupervised Learning
• Whilst ‘learn once’ systems have their uses, ideally one wants something more flexible
(e.g. if class centres drift over time).
Nature Communications, 7, 12611, 2016.
Example #2
Energy-efficient Bayesian Inference
21
Bayesian Inference
“Hardware-Level Bayesian Inference”, Neural Information Processing Systems (NIPS), 2017.
Computing directly in the probability domain
Vector-Matrix-Vector Scalar multiply
Example #3
Empowering new design paradigms
Our world is analogue!
Our electronics is mainly digital!
24
Fusing Analogue and Digital Paradigms
Charge-based computing
Nature Communications, 9, 2170, 2018.
25
Fusing Analogue and Digital Paradigms
Charge-based computing
Nature Communications, 9, 2170, 2018.
26
In silico classifiers
Charge-based computing
Nature Communications, 9, 2170, 2018.
27
In silico classifiers
Charge-based computing
Nature Communications, 9, 2170, 2018.
Example #4
Employ device physics for sensory data compression
On-node processing of rich data with single nanoscale devices
29
Memristive Sensors
Nature Communications, 7, 12805, 2016.
Memristive Sensors
Spike detection & sorting with single nanoscale devices
Nature Communications, vol. 7, 12805, 2016.
RSC Faraday Discussions, 213, 511-520, 2019.
31
Memristive Sensors
Spike sorting with single nanoscale devices
Nature Communications, vol. 7, 12805, 2016.
RSC Faraday Discussions, 213, 511-520, 2019.
Example #5
Bio-hybrid systems: Linking Brain and Silicon Neurons
“Memristive synapses connect brain and silicon
spiking neurons”, Sc. Reports, 10, 2590, 2020
A geographically distributed bio-hybrid neural network
Internet of Neuroelectronics
ANPREBNABm
What’s next?
Unique solutions that address technology gaps across
4 computational pillars
Thinking
AI on a chip
Our chipsets will equip AI systems with sensing, recognition, learning and
reasoning capabilities, paving the way towards “Thinking Machines”.
“AI on chips” will embed intelligence everywhere
How could the future look like?
A pathway to keep your data private!
Bioelectronic Medicines
Feynman: “What I cannot create, I do not understand”
Can we replace parts of our brain?
Can we extend our brain’s capacity?
Can we…???
Augmented Intelligence
What’s next?
Nature Communications, 9, 5267, 2018.
Challenges vs opportunities
180nm TSMC node:
- Custom design kit
- Primitive cells (symbol,
layout, extracted, Verilog-A)
- HV infrastructure
- Memory array design
Under development:
- Shared design library
(IP, analogue cells, etc)
- Scalable on-chip
instrumentation 40
Monolithic integration on CMOS
Top level reticle:
Overall size:
10.9mm x 13.8mm
t.prodromakis@soton.ac.uk
Acknowledgments
This work was supported by:
EU-FP7 RAMP, EP/K017829/1 and EP/R024642/1,
the Royal Academy of Engineering and the Royal Society.

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Implementing AI: Hardware Challenges: Memristive Technologies: from Functional Oxides to AI on a Chip - Prof Themis Prodromakis, University of Southampton

  • 1. Memristive Technologies from functional oxides to AI on a chip Themis Prodromakis Professor of Nanotechnology Zepler Institute, University of Southampton
  • 2. Zepler Institute for Photonics & Nanoelectronics
  • 3. Outline Modern electronics challenges & the AI era needs Memristors: • Technology • Tools & Infrastructure Application Examples – beyond memory Conclusion
  • 4. Our AI is as good as our access to data ENGINEERING CHALLENGE: “The fundamental design of separate memory and processing places a limit on what can be achieved.”
  • 5. Can we continue scaling? The end of Moore’s law???
  • 7. Chua’s symmetry argument STM image of HP’s memristor cross-bar Cross-section of a memristor’s core. L. Chua, “Memristor-the missing circuit element,” IEEE Trans. Circuit Theory, vol. 18, 1971. R. Williams, “How we found the missing memristor,” IEEE spectrum, vol. 45, 2008. Memristor (Memory-resistor)
  • 8. E-Beam lithography of Sub 15 nm ultrahigh density cross-bar memory chips Memristors fabrication Scientific Reports, 6, 32614, 2016. 12
  • 9. Metal-oxide memristors memory capacity up to 7-bit states per cell 13 Scientific Reports, 7, 17532, 2017. b)a) Resistance(k) 30 50 70 90 0 5010 4020 30 Resistance(k) 80 Time (hrs) 2 3 4 50 1 60 40 30 70 50 Time (ms) S1 S47 b) c) Cumulativedistributionfunction(%) Resistance (k 30 0 20 80 60 40 100 40 50 60 Resistance(k) 6 80 Time (hrs) 2 3 4 50 871 60 40 30 S1 S47 S5 S7 70 50 S1 Memristors as analogue memory
  • 11. Example #1 In-silico ML implementations
  • 12. Scientific Reports, 6, 18639, 2016. Eric Kandel Nobel Prize in Physiology 2000 Emulating synapses with memristors
  • 13. 17 Unsupervised learning in probabilistic memristor neural network Switching vs. resistive state relation at fixed voltage levels -> Exploit to encode conditional probabilities Desired switching level Approx. operating V Unsupervised Learning Nature Communications, 7, 12611, 2016.
  • 14. 18 • Network shows capability of learning in unsupervised manner and handles mistakes rather well. • Copes with cases where class centres drift over time. Unsupervised learning in probabilistic memristor neural network Unsupervised Learning Nature Communications, 7, 12611, 2016.
  • 15. 19 Unsupervised learning in probabilistic memristor neural network Unsupervised Learning • Whilst ‘learn once’ systems have their uses, ideally one wants something more flexible (e.g. if class centres drift over time). Nature Communications, 7, 12611, 2016.
  • 17. 21 Bayesian Inference “Hardware-Level Bayesian Inference”, Neural Information Processing Systems (NIPS), 2017. Computing directly in the probability domain Vector-Matrix-Vector Scalar multiply
  • 18. Example #3 Empowering new design paradigms
  • 19. Our world is analogue! Our electronics is mainly digital!
  • 20. 24 Fusing Analogue and Digital Paradigms Charge-based computing Nature Communications, 9, 2170, 2018.
  • 21. 25 Fusing Analogue and Digital Paradigms Charge-based computing Nature Communications, 9, 2170, 2018.
  • 22. 26 In silico classifiers Charge-based computing Nature Communications, 9, 2170, 2018.
  • 23. 27 In silico classifiers Charge-based computing Nature Communications, 9, 2170, 2018.
  • 24. Example #4 Employ device physics for sensory data compression
  • 25. On-node processing of rich data with single nanoscale devices 29 Memristive Sensors Nature Communications, 7, 12805, 2016.
  • 26. Memristive Sensors Spike detection & sorting with single nanoscale devices Nature Communications, vol. 7, 12805, 2016. RSC Faraday Discussions, 213, 511-520, 2019.
  • 27. 31 Memristive Sensors Spike sorting with single nanoscale devices Nature Communications, vol. 7, 12805, 2016. RSC Faraday Discussions, 213, 511-520, 2019.
  • 28. Example #5 Bio-hybrid systems: Linking Brain and Silicon Neurons
  • 29. “Memristive synapses connect brain and silicon spiking neurons”, Sc. Reports, 10, 2590, 2020 A geographically distributed bio-hybrid neural network Internet of Neuroelectronics ANPREBNABm
  • 31. Unique solutions that address technology gaps across 4 computational pillars Thinking AI on a chip Our chipsets will equip AI systems with sensing, recognition, learning and reasoning capabilities, paving the way towards “Thinking Machines”. “AI on chips” will embed intelligence everywhere
  • 32. How could the future look like?
  • 33. A pathway to keep your data private!
  • 34. Bioelectronic Medicines Feynman: “What I cannot create, I do not understand” Can we replace parts of our brain? Can we extend our brain’s capacity? Can we…??? Augmented Intelligence
  • 35. What’s next? Nature Communications, 9, 5267, 2018. Challenges vs opportunities
  • 36. 180nm TSMC node: - Custom design kit - Primitive cells (symbol, layout, extracted, Verilog-A) - HV infrastructure - Memory array design Under development: - Shared design library (IP, analogue cells, etc) - Scalable on-chip instrumentation 40 Monolithic integration on CMOS Top level reticle: Overall size: 10.9mm x 13.8mm
  • 37. t.prodromakis@soton.ac.uk Acknowledgments This work was supported by: EU-FP7 RAMP, EP/K017829/1 and EP/R024642/1, the Royal Academy of Engineering and the Royal Society.